| 1 |
from: commit 33769d2b889e01e0026ce8980ce4f5803ce14d15
|
| 2 |
Author: Dave Airlie <airlied@redhat.com>
|
| 3 |
Date: Fri Apr 17 14:04:02 2009 +1000
|
| 4 |
|
| 5 |
fix oops when setting palette on disconnected crtc
|
| 6 |
|
| 7 |
commit 19f4dc490ab0417a28c100012bdd8d3633fd42a7
|
| 8 |
Author: Adam Jackson <ajax@redhat.com>
|
| 9 |
Date: Fri Apr 17 08:41:09 2009 +1000
|
| 10 |
|
| 11 |
radeon: fix panel mode name
|
| 12 |
|
| 13 |
commit 80a878ea6be30bcd9a48d9b825f0bc5f42a6f31f
|
| 14 |
Author: Dave Airlie <airlied@redhat.com>
|
| 15 |
Date: Fri Apr 17 10:45:51 2009 +1000
|
| 16 |
|
| 17 |
radeon: r3xx/r4xx hw i2c engine ties up lines when in reset
|
| 18 |
|
| 19 |
When the hw offload engine is in reset, it ties up the DDC
|
| 20 |
lines on certain chips
|
| 21 |
|
| 22 |
--- a/drivers/gpu/drm/radeon/radeon_display.c
|
| 23 |
+++ b/drivers/gpu/drm/radeon/radeon_display.c
|
| 24 |
@@ -130,6 +130,9 @@
|
| 25 |
if (size != 256)
|
| 26 |
return;
|
| 27 |
|
| 28 |
+ if (!crtc->fb)
|
| 29 |
+ return;
|
| 30 |
+
|
| 31 |
if (crtc->fb->depth == 16) {
|
| 32 |
for (i = 0; i < 64; i++) {
|
| 33 |
if (i <= 31) {
|
| 34 |
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
|
| 35 |
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
|
| 36 |
@@ -119,9 +119,9 @@
|
| 37 |
mode->flags = 0;
|
| 38 |
|
| 39 |
mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
|
| 40 |
+ drm_mode_set_name(mode);
|
| 41 |
|
| 42 |
- DRM_DEBUG("Adding native panel mode %dx%d\n",
|
| 43 |
- native_mode->panel_xres, native_mode->panel_yres);
|
| 44 |
+ DRM_DEBUG("Adding native panel mode %s\n", mode->name);
|
| 45 |
}
|
| 46 |
return mode;
|
| 47 |
}
|
| 48 |
--- a/drivers/gpu/drm/radeon/radeon_i2c.c
|
| 49 |
+++ b/drivers/gpu/drm/radeon/radeon_i2c.c
|
| 50 |
@@ -65,6 +65,16 @@
|
| 51 |
uint32_t temp;
|
| 52 |
struct radeon_i2c_bus_rec *rec = &radeon_connector->ddc_bus->rec;
|
| 53 |
|
| 54 |
+ /*
|
| 55 |
+ * on certain r3xx/rv4xx the hw i2c block appears to hold the
|
| 56 |
+ * gpio lines in reset, select different gpios to avoid this
|
| 57 |
+ */
|
| 58 |
+ if (radeon_is_r300(dev_priv)) {
|
| 59 |
+ if (rec->a_clk_reg == RADEON_GPIO_VGA_DDC)
|
| 60 |
+ RADEON_WRITE(RADEON_DVI_I2C_CNTL_0, 0x30);
|
| 61 |
+ else
|
| 62 |
+ RADEON_WRITE(RADEON_DVI_I2C_CNTL_0, 0x20);
|
| 63 |
+ }
|
| 64 |
if (lock_state) {
|
| 65 |
temp = RADEON_READ(rec->a_clk_reg);
|
| 66 |
temp &= ~(rec->a_clk_mask);
|
| 67 |
|